According to foreign media reports Wccftech, Synopsys, the global leader in IC design automation software (EDA), announced that its LPDDR6 memory interface IP has completed silicon bring-up testing in TSMC’s N2P process, symbolizing that a new gener...
According to foreign media reports Wccftech, Synopsys, the global leader in IC design automation software (EDA), announced that its LPDDR6 memory interface IP has completed silicon bring-up testing in TSMC’s N2P process, symbolizing that a new generation of low-power mobile memory technology has entered a critical verification stage. The design achieved 86 GB/s bandwidth in testing and complied with the latest LPDDR6 specification of the International Semiconductor Standards Association (JEDEC), showing that this technology can operate stably in advanced process environments.
We’ve successfully achieved silicon bring up of our LPDDR6 IP on TSMC N2P, delivering up to 86GB/s bandwidth. Power next-gen mobile, AI, and edge systems with efficient LPDDR SDRAMs. Learn more: https://t.co/x7MVWMFzyb pic.twitter.com/23tR9jeaTJ
— Synopsys (@Synopsys) October 16, 2025
Synopsys mainly provides simulation, verification and authorization modules required for chip design. The LPDDR6 IP that has completed silicon testing this time includes a controller and a PHY interface. The controller is responsible for JEDEC protocol and timing management, while the PHY is built on TSMC N2P's metal stack and I/O library to ensure low power consumption and signal integrity under high-frequency operation.
The so-called "silicon bring-up" refers to the stage when the chip design is powered on for the first time and verified on the physical wafer after completing the software simulation. This means that the circuit architecture of the IP module has entered physical testing, but has not yet been integrated into a complete system chip. Synopsys said that the verification results show that the LPDDR6 controller and PHY can achieve expected performance in the N2P process, laying the foundation for subsequent customers to introduce SoC designs.
Currently, the mainstream market still uses LPDDR5/LPDDR5X as the main specifications, which are used in smartphones and laptop platforms. These memory particles are produced by Samsung, SK hynix, Micron and other manufacturers using their own processes, emphasizing high speed and low power consumption. LPDDR6 is a new generation mobile memory standard formulated by the International Semiconductor Standards Association JEDEC (Joint Electron Device Engineering Council). The transmission rate can reach up to 14.4Gb/s, which can greatly improve the data processing efficiency of AI mobile phones and edge devices.
According to Synopsys, the LPDDR6 IP can support a per-pin bit rate of 10.667Gb/s, with a theoretical peak of 14.4Gb/s (approximately 115GB/s bandwidth), which is more than 30% higher than the LPDDR5 generation. Relying on the high density and low power consumption of TSMC's N2P process, the new technology is expected to be applied to AI mobile phones, edge computing devices and ultra-lightweight laptops, becoming a new foundation to support on-device AI computing.
Industry observations point out that Synopsys and TSMC have completed LPDDR6 IP verification on N2P nodes, which means that SoC manufacturers will be able to introduce new generation memory standards faster. In the future, the dominance of TSMC and EDA manufacturers will be significantly enhanced in terms of system interface compatibility and verification processes. As SoC process and control IP are dominated by TSMC, memory manufacturers must ensure that their own LPDDR6 particles are fully compatible, and testing and certification costs will also increase.
Currently, LPDDR6 technology is still in the IP verification stage and is expected to be officially introduced into commercial platforms in 2026. As Synopsys and TSMC continue to expand their advanced process IP layout, mobile memory standards are moving towards the 10Gb/s era. The influence of foundry and EDA ecology in future mobile computing will further surpass traditional memory factories and become the key force driving the new generation of AI platforms.
Synopsys Unveils ‘Silicon Bring-Up’ of LPDDR6 IP On TSMC’s Cutting-Edge N2P Node, Reaching Bandwidth Up to a Whopping 86 GB/s
